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timvideos / edid.tv

EDID Database Website
GNU General Public License v2.0
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Fix parsing of detailed timings #17

Closed pp3345 closed 5 years ago

pp3345 commented 5 years ago

According to VESA E-EDID 1.4 Section 3.10.3, only the first three bytes of a display descriptor need to be zeros. The fifth byte is usually zero, however, may also contain a value in case the descriptor tag indicates that this is a Display Range Limits Descriptor.

Furthermore, the third byte may very well be zero even if the descriptor contains a detailed timing: this is in fact the case for screens with, e.g., 2560 or 3840 horizontal addressable pixels (i.e., WQHD or 4K UHD), where the lower 8 bits of the horizontal addressable pixels are zeroes (see Section 3.10.2).

mithro commented 5 years ago

I can merge this, but it would be nice to have some sort of test. Do you have time to add one?

pp3345 commented 5 years ago

Sure, will do that tomorrow.

mithro commented 5 years ago

@pp3345 - btw what is your interest in the project? Do you plan to do more work?

This project is really looking for someone to give it lots of love and would be more than happy to have you help drive that!

pp3345 commented 5 years ago

Here is the promised test case (which fails without this PR).

Honestly, I am primarily interested in finding out how common it is for HDMI and DisplayPort monitors to have a Video Capability Data Block in their CTA-861 extension block, so I also plan to work on CTA-861 parsing and maybe some other smaller stuff, though I can't really guarantee for anything right now.