mithro commented 7 years ago

[LiteX] Create a litescope based "Integrated Bit Error Ratio Tester" (iBERT) clone

Brief explanation

Xilinx has a logicore called iBERT for doing testing of error rates on high speed channels. The task is to create a similar tool based on LiteX and LiteScope.

Expected results

Gateware can be generated for a given board with high speed transceivers and a GUI tool on the computer can be used to examine error rates over the transceivers using different settings.

Detailed Explanation

This project has three parts;

a) Data sequence generators + checkers. These generate given bit data stream, then after transmission and receiving check that the bit data stream is correct.

b) Data channel wrappers. These give you a common interface to controlling the parameters of a channel used in transmission and receiving. For simple data channels this might just provide clock control. For more advanced channels, like the high speed transceivers, this provides things like controlling parameters like pre-emphasis, equalisation, etc.

c) Host computer Control GUI / Console. This gives a nice interface for controlling all the parameters and seeing the results of various tests. This is the Xilinx iBERT Console ->

The student is expected to create all three parts of this tool reusing litescope and litex for the FPGA<->Host communication and development. The work can be seen in the following diagram, the parts in blue need to be developed by the student.

LiteX iBERT Diagram

Knowledge Prerequisites

This project requires access to FPGA hardware with high speed transceivers.

Contacts

Potential Mentors: @mithro, @enjoy-digital
Mailing list: hdmi2usb@groups.google.com

akhil-123 commented 6 years ago

I would like to work on this project. Any tips to follow?

anant3110 commented 6 years ago

I want to work on this issue. I might have access to a vertex 7 board from my institute. Would that work?

timvideos / getting-started