Closed mithro closed 7 years ago
The SPI flash operates in two modes;
Reading is done via the memory mapped interface. The bit banging is needed for writing.
There is an existing model for emulation of SPI flash we use.
https://github.com/timvideos/qemu-litex/tree/master/hw/ssi https://github.com/timvideos/qemu-litex/blob/master/hw/block/m25p80.c
It's working!
Branch started for rebase onto master and merging upstream - https://github.com/mithro/qemu/tree/litex-spi
The SPI flash operates in two modes;
Reading is done via the memory mapped interface. The bit banging is needed for writing.
There is an existing model for emulation of SPI flash we use.