Closed meawoppl closed 4 years ago
Yes, strange but true! I can see why this is confusing... This is the original upduino 2.0 design, I have not made any schematic changes.
There's a new design: please see the upduino 3.0 github. Hope these and other bugs are fixed there. Board build is in process.
https://github.com/tinyvision-ai-inc/UPduino-v3.0
On Thu, Dec 26, 2019, 2:56 PM Matty G notifications@github.com wrote:
In the schematic the jumper for VCCIO_3 is wired in the port on the chip labeled VCCIO_0. I don't know if this is a mistake or a strange convention, but it cost me several hours today :/
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In the schematic the jumper for
VCCIO_3
is wired in the port on the chip labeledVCCIO_0
. I don't know if this is a mistake or a strange convention, but it cost me several hours today :/