Closed MichaelBell closed 1 year ago
As discussed, it would be a good idea to minimize the chance of conflicts between the FPGA and RP2040 on the CS lines by setting the pin back to an input with appropriate pull on deselect.
Good thing we have this ice_spi.h library that centralizes all SPI I/O, this patch is trivial this way. Thank you for delivering it so fast!
ice_spi.h
As discussed, it would be a good idea to minimize the chance of conflicts between the FPGA and RP2040 on the CS lines by setting the pin back to an input with appropriate pull on deselect.