Closed haoyu-zc closed 1 year ago
If those are lane immediates, then nasm
is probably checking that they are in range of the lane indices. So you should change the assembler test generator to have a set of valid indices.
Thank you! It turns out I need to set regSize
to specify r32 registers
I'm stuck with another issue now. I created a new test pattern do_r_s_b
for lane extractions but the tests failed. One of the assembler methods as an example is:
def pextrq_r_s_i(a: X86_64Gpr, b: X86_64Xmmr, imm: u8) -> this {
emitb(0x66);
emit_rex_bbb_r_r(a, b, REX_W, 0x0F, 0x3A, 0x16);
emitb(imm);
}
However, the generated asm code is off at the bytes specifying registers in some lines:
I doubt the method emit_rex_bbb_r_r
is not compatible with patterns like `r_s_b". Or could you give me some suggestions to fix this? Thank you!
(The diff file is attached)
Hmm, I don't have any more insights other than that instruction is apparently not encoded the way the utility method works. You'll have to double-check how it is encoded in the manual.
emit_rex_bbb_r_r2
and emit_rex_bbb_m_r
to correctly handle v128 lane extractions
I tried to add two test patterns:
do_s_r_b
anddo_r_s_b" in X86_64AssemblerTestGen.v3. However, when I invoked them with newly implemented instructions
pinsrb_s_r_iand
pextrb_r_s_i`, the tests failed:pinsrb_s_r_i
: error: invalid combination of opcode and operandspextrb_r_s_i
: Comparing...failedFor both of the two instructions I'm sure I wrote the bytes correctly. But I have no clues what would lead to the failures. Could you give me some help here?