Question - 3LB protocol using Raspberry PI

[ibanezgomez]

Hi tomaskovacik, do you think is posible to implement the 3LB protocol and comunicate whit instrument cluster using a Raspberry Pi and GPIO interfaces?

Using your code I've tried this: http://pastebin.com/Qg08ZqYr

But whitout success.

What do you think? Your work is awesome!!!

Thanks, Samuel.

[tomaskovacik]

try disable ena functionaly at all and we will see

On 03.11.2016 11:20, ibanezgomez wrote:

Hi tomaskovacik, do you think is posible to implement the 3LB protocol and comunicate whit instrument cluster using a Raspberry Pi and GPIO interfaces?

Using your code I've tried this: http://pastebin.com/Qg08ZqYr

But whitout success.

What do you think? Your work is awesome!!!

Thanks, Samuel.

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[ibanezgomez]

I'm sorry but I do not understand properly.

Should eliminate the ENA signal?

[tomaskovacik]

on my old audi, if nothing change on ENABLE line, cluster will show text for about 30seconds or so. This is standard SPI with somehow strange ENABLE line, wich can be "bidirectional". with something like ack functionality

t.

[mnaberez]

do you think is posible to implement the 3LB protocol and comunicate whit instrument cluster using a Raspberry Pi and GPIO interfaces?

derpston/linux-rpi-audi-dis

[tomaskovacik]

I completely forgot about this project, I should check his code and fix arduino code if there is something wrong :)

ok, his theory of checksum is ok. but only if we ignore what logic sniffer, see: idle state of clock is HIGH so CPOL=1 , then what ever I change in SPI analyzer mode of SPI to mode2 or mode3 (data validation on clock rising/falling edge) output is always same: revers asci chars

http://1.bp.blogspot.com/-GUtQ1biU1C0/UxCbmQKKvcI/AAAAAAAAJnc/le40xt7Tyts/s1600/Screenshot+from+2014-02-28+15:19:57.png

if we invert what we have received then it's ok

my point: I do full clock cycle while data are valit, so what ever receiver is mode2 or mode3 of SPI does not mater:

  switch (iResult[i]) {
    case 1: digitalWrite(FIS_WRITE_DATA,HIGH);
            break;
    case 0:digitalWrite(FIS_WRITE_DATA,LOW);
           break;
    }
    digitalWrite(FIS_WRITE_CLK,LOW);
    delayMicroseconds(FIS_WRITE_PULSEW);
    digitalWrite(FIS_WRITE_CLK,HIGH);
    delayMicroseconds(FIS_WRITE_PULSEW);