Fixed point converter improvements; FpxxConverter pipelining

[fayalalebrun]

This adds several improvements to the converters from and to fixed point:

• Fixed point to floating point now supports fractional bits
• Uses AFix and Flow in I/O
• Uses pipelining API
• Can optionally generate and consume flags to preserve the status of inf/nan

Additionally, I pipelined FpxxConverter according to the bottlenecks I observed in Vivado synthesis. However, depending on the source and output floating point format, the delay and resource consumption of each path may vary greatly. Therefore, instead of a number, this component takes a tuple of booleans corresponding to whether each pipeline stage is enabled.

[fayalalebrun]

I have added rounding support for FpxxAdd and AFix2Fpxx. The previous behaviour can still be achieved by using round to zero mode.

FpxxAdd can also now optionally calculate the sticky bit correctly, which means there is no more mantissa error compared to a compliant implementation.