search

tomverbeure / panologic-g2

Pano Logic G2 Reverse Engineering Project
Apache License 2.0
134 stars 21 forks source link

DVI example not working on Pano Logic DVI REV-C #2

Closed derekmulcahy closed 5 years ago

derekmulcahy commented 5 years ago

The DVI REV-C version of the Pana Logic has an XC6SLX100 instead of the 150 used in the REV-B. The blink program works great but when I tried the DVI example, after changing the FPGA type in the design properties, I don't see any output. What should I expect to see? I checked the boards and they are very similar to the REV-B photos on a first visual inspection.

I didn't intend to buy the DVI REV-C, the eBay auction details said it was a DVI REV-B. Caveat emptor!

tomverbeure commented 5 years ago

See the README of the DVI example: it doesn’t work yet. I don’t think cyrozap got to that point yet. Upon checking the Chrontel datasheet, I noticed that you have to program it over I2C to bring it out of power down. I hope to make that work this weekend.

As for the LX100 and rev C: that’s for letting me know. I’m not familiar with the gory details of their product line. I’ll update the page to let others know.

The LX100 is luckily still a powerful FPGA!

tomverbeure commented 5 years ago

I've updated the README with LX100 info with commit b39da8e98ca14.

derekmulcahy commented 5 years ago

A bit off topic but I am looking at programming the audio chip. A set of schematics for the G1 were uploaded to dropbox and it looks like that part of the implementation would be the same for the G2 (sans microphone).

tomverbeure commented 5 years ago

I was already able to get the audio to work somewhat on the G1: https://tomverbeure.github.io/pano/logic/2018/07/10/pano-logic-update-audio-playback.html and https://github.com/tomverbeure/panologic/blob/master/bringup/sw/audio.c

It wasn't perfect and I wasn't able to get the speaker to work, but it's probably just a matter of register settings.

Tom

tomverbeure commented 5 years ago

DVI is working now, though it's not in the ./dvi_example directory, but in the ./spinal directory. (Sorry for the initial hassle to get that up and running: it saves me huge amount of time to use Spinal instead of pure Verilog.)

I've also included a Pano.lx100.bit bitstream in the ./ise directory, but that one is untested since I don't have a device like that.

Tom

derekmulcahy commented 5 years ago

That fixed it! I have been noodling around with Spinal for a few weeks so no issues there. Your lx100 bit stream works as does my own rebuild from source.

DVI output worked great, very clear display, but using the RGB adapter that came with Pano didn't. I tried enabling RGB by setting reg 0x21 to 0x01 and my monitor flickers occasionally and almost displays a green image with text!

I have a spare LX100 if you want it.

tomverbeure commented 5 years ago

Good to know that it works on an LX100! An LX100 is identical to an LX150 from a silicon point of view. It's just Xilinx ISE that puts in an artificial gates restrictions. So I don't think a revC will behave any different.

I haven't tried the VGA output yet. It's on the list but not as high priority. I've just ordered a micro-HDMI to HDMI cable. It uses the same Chrontel chip, so it should just work (tm). I want to get 1080p going since that's way more strenuous on settings the clock edges right than the current 640x480.

After that I may take a break from video stuff and start looking at Ethernet or maybe USB (on the G1, since there's no EHCI controllers on the G2: you need to do it ) It's about time that these things start getting input interfaces.

Thanks! Tom

derekmulcahy commented 5 years ago

I just gave the micro-HDMI connector a quick try and it didn't work.

zephray commented 5 years ago

For the VGA output under 640x480 resolution, I have a Xilinx ML505 development board which featuring the same CH7301 chip for DVI output, and the code below is tested to work on that board. I have tried DVI-2-VGA + VGA monitor, DVI-2-VGA + VGA capture card, DVI monitor, and DVI-2-HDMI + HDMI TV, they all worked just fine. IIC configuration: https://github.com/zephray/VerilogBoy/blob/master/rtl/GameBoy/iic_init.v DVI interface: https://github.com/zephray/VerilogBoy/blob/master/rtl/GameBoy/dvi_module.v These codes are not tested on the Pano Logic Client, yet. I need to upgrade my PC to Windows 10 first to use new ISE (I guess) and currently I am busy with my finals. I should be able to test them next week. And it seems that CH7301 doesn't support 1080p 60Hz mode, the highest it can support is 1600x1200 60Hz or 1920x1080 30Hz.

tomverbeure commented 5 years ago

I just gave the micro-HDMI connector a quick try and it didn't work.

You need to change the I2C address from 0x76 to 0x76. Or simply uncomment that line in program.c to initialize both chips in parallel.

Tom

derekmulcahy commented 5 years ago

HDMI working, thanks.

tomverbeure commented 5 years ago

And it seems that CH7301 doesn't support 1080p 60Hz mode, the highest it can support is 1600x1200 60Hz or 1920x1080 30Hz.

The CH7301C supports a pixel clock up to 165MHz.

1920x1200@60 needs 154MHz when using CVT-RB timings. I don't know if CVT-RB is the standard for this resolution though, but since my very old 1920x1080@60 Dell monitor uses single-link DVI (which is limited to 165MHz), I assume that it is.

1080p@60 needs 148.5MHz when using DMT timings (and 138.6MHz for CVT-RB), and DMT is the standard timing for this resolution.

These things came to market with 1080p was already very popular, so I'm assuming that the Pano hardware will support it.

The VerilogBoy project looks great! And a Pano box seems to be a perfect device to use it.

tomverbeure commented 5 years ago

HDMI working, thanks.

Do have you any quality issues with HDMI?

It's also working for me, but with terrible image quality.

tomverbeure commented 5 years ago

Do have you any quality issues with HDMI?

It's also working for me, but with terrible image quality.

I made HDMI work cleanly (at least for 640x480) by settings the IO slew rate to FAST.

Tom

derekmulcahy commented 5 years ago

Just tried it and the FAST mode (and the previous mode) works for me. The quality is good, no edge reflections, no blurring, no misalignment. Very steady, sharp and clean.

tomverbeure commented 5 years ago

Hey @zephray !

1080p@60Hz is working on both DVI and HDMI!

https://twitter.com/tom_verbeure/status/1075651899192311808

Tom

zephray commented 5 years ago

That’s really cool, so that’s probably also gonna to work on my Virtex-5 board. I was just reading the datasheet, and it says only 1080p30Hz, plus I don’t really need that, so I didn’t try myself. Good to know it is actually possible!

derekmulcahy commented 5 years ago

Tom, Awesome! Just checked it out and it looks perfect.

joeyjyliu commented 5 years ago

Sorry to comment on the closed ticket. I tried to use E8/D9 for I2C clock and data line but it seems it didn't respond. Do I need do anything specific for these pull-up lines? Thanks. I even tried to use a lower freq for I2C clock as the spec says the max it can do is 400kHz.

tomverbeure commented 5 years ago

Hello Joey,

I don't quite remember what kind of clock speed for the I2C interface to the Chrontel chips, but I doubt that it's much faster than 100kHz.

Have you tried the bitstreams that are included in the project: https://github.com/tomverbeure/panologic-g2/tree/master/spinal/ise

I don't have a pullup configured on the IOs because I assume that there is a pullup resistor on the PCB. So when I want SCL/SDA to be high, I simply set the IO to input (==HiZ) and the resistor will do the rest.

Tom

joeyjyliu commented 5 years ago

Thanks for your quick reply. I tried your bitstream file and yes I can get the DVI output perfectly. But with my Verilog code I can’t get the ack from the chip after I wrote the address 75h and 0 (w). I guess I need to look harder. The same code did work well on a different fpga board for a different video chip.

On Tue, May 21, 2019 at 7:43 PM Tom Verbeure notifications@github.com wrote:

Hello Joey,

I don't quite remember what kind of clock speed for the I2C interface to the Chrontel chips, but I doubt that it's much faster than 100kHz.

Have you tried the bitstreams that are included in the project: https://github.com/tomverbeure/panologic-g2/tree/master/spinal/ise

I don't have a pullup configured on the IOs because I assume that there is a pullup resistor on the PCB. So when I want SCL/SDA to be high, I simply set the IO to input (==HiZ) and the resistor will do the rest.

Tom

— You are receiving this because you commented. Reply to this email directly, view it on GitHub https://github.com/tomverbeure/panologic-g2/issues/2?email_source=notifications&email_token=AANVUDHNCQXIO4SIRUXAFGLPWSCLLA5CNFSM4GJGXSIKYY3PNVWWK3TUL52HS4DFVREXG43VMVBW63LNMVXHJKTDN5WW2ZLOORPWSZGODV5PXGY#issuecomment-494599067, or mute the thread https://github.com/notifications/unsubscribe-auth/AANVUDHBXDOEP2RHZ2UU72LPWSCLLANCNFSM4GJGXSIA .

joeyjyliu commented 5 years ago

so which is which? Is 0x76 for the DVI or HDMI? Thanks.

You need to change the I2C address from 0x76 to 0x76. Or simply uncomment that line in program.c to initialize both chips in parallel.

Tom

tomverbeure commented 5 years ago

According to this: https://github.com/tomverbeure/panologic-g2/commit/02073e4cf2b7f05b965be6d4c201d9f7c68af4ca

0x76 is DVI and 0x75 is HDMI.

Tom