Closed hawkw closed 10 months ago
hmm, apparently something on this branch is actually making display updates way laggier than on main
. gotta figure out what i did wrong!
hmm, apparently something on this branch is actually making display updates way laggier than on
main
. gotta figure out what i did wrong!
Update on this: it was because i accidentally changed the DestDrqType
for the SPI DMA transfers to Uart0Tx
, which meant that the SPI sender wasn't getting woken when it was supposed to: https://github.com/tosc-rs/mnemos/pull/284/commits/5f948674f67825d4af37b1f6fd222b474f8c035c#diff-a1c995e700c35a1d06d5b9dff0ad6c866aa593007816181749bf218c6c69444aR129
I've fixed that and now everything is nice and snappy.
Currently, the DMAC descriptor configuration fields are bit-packed every time a descriptor is constructed. However, the drivers which use DMA always construct descriptors with the same configuration bitfields -- only the addresses and lengths change. We can make this more efficient by constructing the config field once and copying it into each new descriptor.
This branch replaces the existing
DescriptorConfig
struct with aDescriptorBuilder
, which is basically the same thing except it actually constructs the bitfield as a single u32. I usedmycelium-bitfield
to do this --- mostly for fun, but it's maybe a bit more readable than the previous code? I dunno.