Closed Wuerfel21 closed 1 year ago
Aargh, thanks for catching that; I also missed a check for volatile instructions. There is already code that handles this for the add/sub cases, and I guess we could comment those out, but I did want the shl/shr cases handled because they come up sometimes in code that handles bytes and shorts.
Removed the redundant add/sub optimizations.
Optimization introduced in 72c5cb98bc3ddccdd409cb2bfd556b1375c7f22a is bugged:
InstrSetsAnyFlags
is only checked on the first instruction. Some merges are actually incorrect if the second instruction sets C (shifts are correct, but only on P2 and if the second shift amount is not zero. Logic ops are always correct like that, add/sub never).