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travisdowns / uarch-bench

A benchmark for low-level CPU micro-architectural features
MIT License
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Add benchmark for tight loop that crosses cacheline boundary #79

Closed mfleming closed 4 years ago

mfleming commented 4 years ago

The two tests (one that crosses cacheline and one that is entirely inside a cacheline) in this patch show different results across a number of CPUs including:

But the results are the same on:

My current hypothesis is that a functioning LSD hides this cross-cacheline issue.

travisdowns commented 4 years ago

This is on my todo for today.

travisdowns commented 4 years ago

This is on my todo for today.

OK, that was true if by "today" you mean "twoday [from now]"...

Thanks for this, Matt.

I'll try running this locally and see if anything interesting turns up!