Integrate Google's Verible system-verilog parser

[poetaman]

Google is actively developing and maintaining a full system verilog parser. Check these out:

https://github.com/google/verible#systemverilog-developer-tools https://github.com/google/verible/tree/master/verilog/parser

What parser do you use? Verible would be recommended as Google won't abandon it given it has silicon development teams that develop silicon in-house (like their TPU computing).

[vivekmalneedi]

tree-sitter-verilog is a SystemVerilog grammar for the tree-sitter parser generator tool. There isn't any reason to integrate a separate parser as tree-sitter-verilog was created to allow the generation of a tree-sitter parser for SystemVerilog.