User specified vpp config files

triSYCL / sycl

SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM

Other

108 stars 19 forks source link

User specified vpp config files #137

Closed gogo2 closed 3 years ago

gogo2 commented 3 years ago

This adds the ability to specify config files for Vitis compilation and linking in environment variables SYCL_VXX_COMP_CONFIG and SYCL_VXX_LINK_CONFIG.

keryell commented 3 years ago

We messed up with our last merge from Intel up-stream so I force-pushed triSYCL:sycl/unified/next. This PR is still good, just that your internal triSYCL:sycl/unified/next should be git reset to https://github.com/triSYCL/sycl/commit/c5821e34f46d008f1048f0926735aaf9f68447a4 Sorry bout that.

gogo2 commented 3 years ago

Thanks for the suggestion. Is it possible for you to add documentation for your new variable in sycl/doc/GettingStartedXilinxFPGA.md ?

Done.

keryell commented 3 years ago

Great! Thanks for the contribution.