SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
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[SYCL][XRT][Vitis] Fix some failing tests + improve device detection of xrt_pi #185
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Ralender closed 2 years ago
do not merge yet I started merging from upstream and this will be rebased on the merge