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3 years ago Unit Test Results
11 files ±0 11 suites ±0 16s :stopwatch: ±0s 313 tests ±0 313 :heavy_check_mark: ±0 0 :zzz: ±0 0 :x: ±0 315 runs ±0 315 :heavy_check_mark: ±0 0 :zzz: ±0 0 :x: ±0
Results for commit 2a64f537. ± Comparison against base commit 2a64f537.
This pull request removes 141 and adds 31 tests. Note that renamed tests count towards both.
``` bool result = true && false bool result = true && false || true onebit lanterns 0x13 port 0x0018 end 0x03:0x14 0x6E:0x00 b1 main seg1 b1 main seg2 b1.down --… … ``` ``` de.uniba.swt.dsl.generator.BahnGeneratorTest ‑ [2] module config_empty boards master 0x00 end segments master end signals master end points master end peripherals master end blocks end crossings end layout end trains end end de.uniba.swt.dsl.generator.BahnGeneratorTest ‑ [3] def request_route(string src_signal_id, string dst_signal_id, string train_id): string string ids[] = get routes from src_signal_id to dst_signal_id return get_shortest_route(ids) end def drive_route(string route_id, string train_id, string segment_ids[]) string block_id = get_block(route_id, segment_ids) string pre_block = get_previous_block(route_id, block_id) string signal_ids[] = get config block.block_signals pre_block for string signal_id in signal_ids set state signal_id to stop end end de.uniba.swt.dsl.generator.BahnGeneratorTest ‑ [5] def request_route(string src_signal_id, string dst_signal_id, string train_id): string return "" end def drive_route(string route_id, string train_id, string segment_ids[]) end de.uniba.swt.dsl.generator.BahnGeneratorTest ‑ [6] module standard boards master 0xDA000D680052EF features 0x03:0x14 0x6E:0x00 end lightcontrol 0x05000D6B0083EC onecontrol 0x05000D7500DBED end segments master end signals lightcontrol end points onecontrol end peripherals onecontrol end peripherals lightcontrol end blocks end platforms end layout end trains end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [10] module test peripherals lightcontrol onebit lanterns 0x13 port 0x0018 end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [3] module test segments master seg1 0x00 length 34cm end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [4] module test signals master entry sig1 0x00 distant sig2 0x02 composite sig3 signals sig1 sig2 end end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [5] module test layout b1.up -- p1.stem b2.up -- p1.straight b3.down -- p1.side end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [6] module test layout b1.up -- p1.down1 b2.up -- p1.down2 b3.down -- p1.up1 b4.down -- p1.up2 end end de.uniba.swt.dsl.tests.parser.ConfigurationParsingTest ‑ [7] module test layout sig1 -- b1.down sig2 -- b2.up end end … ```:recycle: This comment has been updated with latest results.
Added board peripherals, route orientation, and reversed blocks