truhy
commented
1 year ago Thanks for the suggestion - I didn't know that was off by default, discussion tab enabled.
It does not rely on any paid software, everything is done with free tools. The FPGA needs to send results over the UART, and to avoid needing another serial UART circuit or wiring data pins externally, I wanted to use the existing UART controller that is on the ARM processor side (HPS), but that is easier said than done. I did not want to use the NIOS II - an emulated processor on the FPGA side. To use the UART controller it requires the FPGA-to-HPS bridge to be enabled by software on the processor side, this is where U-Boot is handy. U-Boot is a boot program that runs on the processor side and that needs to be compiled using a suitable compiler such as ARM DS-5 (an IDE and is not free) or GNU GCC (free). I've used GNU GCC to compile U-Boot on Ubuntu linux. I've left my bash shell scripts in the "scripts" folder and also "other" folder.
These are all done on the FPGA side in Verilog:
- the ADC configuration and readout
- the result transmission to the UART controller
These are done on the processor side using U-Boot and U-Boot script:
- loading of the FPGA .rbf file
- enabling interconnect bridges (e.g. FPGA-to-HPS bridge)
- serial UART controller setup and handling
Yes it is possible to just replace the FPGA image file (.rbf) on the SD image. On Windows 10 you'll need to use Disk Manager to assign the FAT partition a drive letter so that it appears in File Explorer. The FPGA Quartus Prime Lite will only produce a FPGA file in .sof format, so you will need to convert it into the .rbf format. The command line "quartus_cpf" tool can be used for the conversion and is found in the bin folder of Quartus Prime Lite. Have a look in my command line script convert_sof_to_rbf: for linux: scripts/other folder for windows scripts/windows folder
I have not tried booting the SD image and while leaving it running, sending a new FPGA image (.sof) - that may actually work. The problem is the FPGA-to-HPS needs to stay enabled for the UART to work on the FPGA side.
I have made another project which embeds U-Boot SPL into the FPGA on-chip RAM and is part of the .sof image, but because there is missing jumper/switch for boot from FPGA and also the boot ROM bug it can only boot if an empty SD Card is inserted.
On Sun, 13 Nov 2022 at 09:02, Andy2No @.***> wrote:
Apologies for opening an issue, when this isn't really an issue, but I do have questions.
I'm glad to see this repo is still active. Would you consider adding a Discussion tab? They're good for people to ask questions that aren't issues, and for helping to understand a repo better, and in some cases it may be appropriate for users of the repo to answer questions for each other, rather than relying on you to answer.
First of all, does this rely on using any software tools that need to be paid for? I understand that a major spanner has been thrown into the works of Intel SoC FPGA development by requiring an expensive license for ARM DS-5. I also understand that it isn't always needed, but I'm not clear when.
My current basic level of understanding of FPGAs extends to creating or editing Verilog in Quartus and using it to produce an FPGA image. I've looked into the process of making SD card images for the Intel SoC FPGAs, but it appears to make an already long development cycle much longer. Is it possible to just take your existing SD image and replace the FPGA image file, after making changes in Quartus? Or, for testing purposes, maybe just send a new FPGA image via the USB Blaster socket which would survive until it's rebooted?
I've also looked at robseb/rsyocto, and tried it briefly, a while ago. Using that I was able to send an FPGA image over the USB serial port (I could also have used the network connection, but it means an extra cable), and have it loaded on reboot. Is something like that possible with your approach too?
— Reply to this email directly, view it on GitHub https://github.com/truhy/adc_f2h_uart_de10nano/issues/1, or unsubscribe https://github.com/notifications/unsubscribe-auth/ASWYSHPMXIFFSSZC7VUSJUTWICVCXANCNFSM6AAAAAAR623KGI . You are receiving this because you are subscribed to this thread.Message ID: @.***>
Andy2No
Apologies for opening an issue, when this isn't really an issue, but I do have questions.
I'm glad to see this repo is still active. Would you consider adding a Discussion tab? They're good for people to ask questions that aren't issues, and for helping to understand a repo better, and in some cases it may be appropriate for users of the repo to answer questions for each other, rather than relying on you to answer.
First of all, does this rely on using any software tools that need to be paid for? I understand that a major spanner has been thrown into the works of Intel SoC FPGA development by requiring an expensive license for ARM DS-5. I also understand that it isn't always needed, but I'm not clear when.
My current basic level of understanding of FPGAs extends to creating or editing Verilog in Quartus and using it to produce an FPGA image. I've looked into the process of making SD card images for the Intel SoC FPGAs, but it appears to make an already long development cycle much longer. Is it possible to just take your existing SD image and replace the FPGA image file, after making changes in Quartus? Or, for testing purposes, maybe just send a new FPGA image via the USB Blaster socket which would survive until it's rebooted?
I've also looked at robseb/rsyocto, and tried it briefly, a while ago. Using that I was able to send an FPGA image over the USB serial port (I could also have used the network connection, but it means an extra cable), and have it loaded on reboot. Is something like that possible with your approach too?