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tslabs / zx-evo

TS-Configuration for ZX Spectrum clone named ZX-Evolution
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VDAC2: CPLD is not required #77

Closed sorgelig closed 4 years ago

sorgelig commented 4 years ago

To convert 5 bits video to 8 bits you just need to do this: out[7:0] = {in[4:0],in[4:2]};

This will convert range 0..31 to full 0..255 range. And it can be done by direct wiring of ADV7125 to IDE port. Mode signal it seems meaningless IMHO, but if really required, then out[2:0] part can be masked by simple 3x dual OR/AND elements.

wbcbz7 commented 4 years ago

Hello! Unfortunately, it is not possible in fact to omit CPLD from VDAC schematic, because: 1) In original ZX Evo design, only two bits per component (total 6bits for RGB - 64 colors) is available for video output, and while it was sufficient for ZX and BaseConf graphic modes which are never exceed 16 colors out of 64c palette, TS-Config is designed to allow to use up to 256 colors on screen at once. So, a PWM palette scheme was implemented, displaying intermediate color shades using 2 existing bits per component as a subpixel dithering pattern, allowing up to 25 shades per component (internally 5 bits per component but shades 25-31 are aliased to 24) resulting in total 15625 colors RGB palette. However, it results in non-linear palette gamma curve and a multitude of annoying artifacts on LCD due to interference between LCD ADC sampling and Evo pixel clock and other factors. So, to eliminate those drawbacks and extend palette to full 5 bits for component, an external DAC is needed (such as ADV7125). Since external DACs accept linear gamma ramps and to maintain compatibility with existing software, a CPLD is used which translates non-linear PWM gamma ramp to linear or simply pass through color data to the DAC, according to bit 15 of palette (aka PAL_SEL on schematic). It is possible to translate color data on main FPGA, but it will consume large amount of LEs and cripple the color resolution to 5 bits pre component. 2) Some time later another revision of VDAC is developed, which makes use of FT812 graphics chip. Again, a CPLD is needed to switch between FT and ZX-Evo video outs (while a discrete 2-to-1 mux seems to be enough, it is not cause CPLD also performs other function)

Hope I have answered to your request :)

sorgelig commented 4 years ago

I see the reason now. Thanks for pointing out to non-linear translation.