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tsunamayo / Starship-EVO

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BUG Major propagation issue with logic (Video) #3082

Open MatCat opened 3 years ago

MatCat commented 3 years ago

So I am trying to build a computer in this game, but I have a hit a brick wall with the logic not propagating properly. I build a very simple 8 bit memory cell, and cannot get it to work properly, video of the issue is attached. Ultimately not all of the logic is evaluating in a single game tick as it should, which is causing failure of logic. I think it's acceptable to allow lag per tick if there is alot of logic to calculate, because ultimately if the logic doesn't work properly, its useless, peoples landing gear and complex things will break. This ultimately is a very simple beginnings, for me to make a computer there will be some gates that will need to be able to propagate out to thousands of elements at once (like the clock) for example.

https://www.youtube.com/watch?v=ZR7PMn9p9mQ

tsunamayo commented 3 years ago

Okay what version are you using? It should be written on your screen but for some reason it seems cropped. I have made some change to the way logic gate operate. Thx

MatCat commented 3 years ago

Yeah, I have an ultrawide monitor but I didn't configure the capture properly so it only did 1080P cut off the side, 20W41C

tsunamayo commented 3 years ago

Okay, it is a bit complicated to debug your issue, did you manage to isolate what was not working?

MatCat commented 3 years ago

No, other then that I did notice that the more load my computer had on it, the worse it gets, I.E. in my video something like half of them might come on, before that I had a bunch of stuff open and when I hit the button only 1 would light up at a time, so it SEEMS the logic engine is splitting up logic evaluations across ticks depending on load.

tsunamayo commented 3 years ago

It is not looking at your cpu load so it must be something else. Logic gate will evaluate at the end of the frame a single time. Do you have several logic gate stacked together?

MatCat commented 3 years ago

Well yeah, in the video I kind of go over all the connections but there are 2 AND gates tied out to 8x2 locations, since each bit needs to be checked and there are 8 bits.

MatCat commented 3 years ago

Can't wait to see how it acts when I try to make a proper 32k memory block with thousands of copies of it and the clock has to propogate out across thousands and thousands of logic gates

milan-t commented 3 years ago

Hello, I would like to join bug investigation and report something similar. Logic gates are one of my favorite feature of this game.

Few days ago I tried to reproduce problem but I failed to build working replica of the 1 bit memory cell circuit presented in linked video. Using a switch as memory element is interesting solution, so I built my own version. I works, probably because it is using less gates in succession.

Here is memory cell: SsE_switch_mem_8bit_201023

D-latch schematics (switch and switchless variant): SsE_D-latch_2_variants_201024

Presented bug motivated me to also try to build some kind of microcomputer in the game. Games containing sort of logic blocks tempts to build more complex mechanisms. After unfruitful thinking about instruction set and CPU architecture and browsing few books, I tried to do something easier focusing on smaller parts like CPU's ALU building blocks. From truth table I derived 1 bit adder/subtractor. 1 bit unit works well. Chaining more 1 bit units together leads to invalid result when setting bits.

One case involves addition 3 + 3. Result is 6 or 2 depending on order in which switches are fliped on. SsE_added-subtractor_error_201023

To rule out wiring mistake I built debugging version. I see that second carry signal (C2) is not set properly when switching from lowest bit up. OR gate ignores logical 1 from AND gate on left side. SsE_adder-subtractor_debug_steps_to_fail_201023

When switches are flipted from higher bit to lower one, result is correct: SsE_adder-subtractor_debug_steps_to_success_201023

Here is the schematic for better illustration how many gates are stacked (problematic OR gate in dashed rectange - currently showing correct value): StarshipEvo_adder_subtractor

For me it looks like that added/subtractor logic circuit has similar problem with logic propagation. Visiting properties of problematic OR gate (or any other gate that does not work properly) fixes temporarily wrong value. It probably triggers update.

I tried to put AND gates separation between swiches and adder/subtractor input to set all values at the same time. It ended up with different wrong results. Also using delays for carry bit propagation or sending wave of logic 1s to input does not helped. I may think about some workaround later.

MatCat commented 3 years ago

Yeah I took a break on my logic stuff in game until this is addressed :). BUT about your instruction set thoughts, traditionally most homebrew systems will use ROM as a lookup table, the ADDRESS becomes the opcode and the output becomes the control lines for the architecture, this makes it very easy to adjust your instruction set, however in the case of this game and how logic is for now, it is far easier to create a very simple instruction set and try to design your opcode format to do as much of the control logic as possible for you.

tsunamayo commented 3 years ago

@milan-t that is all very impressive! Now it is really hard for me to debug like that. What could be great if we want to make progress on this issue is to create a very small test case of the issue. Make a circuit with the minimum amount of gate possible that is not working as expected, and I will investigate and fix it! Cheers