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tum-ei-eda / etiss

Extendable Translating Instruction Set Simulator
https://tum-ei-eda.github.io/etiss/
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CPU bootup #11

Closed uzleosharif closed 3 years ago

uzleosharif commented 4 years ago

Currently in both the 32/64 bit versions of RISCVArch implementations, we are forced to boot from 0x80 which might not be true for general RISCV SoCs, though compatible with Pulpino. We have to provide flexibility and remove this hardcoded impl.

Moreover it also seems that RISCArch::resetCPU(... cpu, ... startpointer) doesn't really respect the custom passed startpointer b/c the HW reset at the start of the simulation basically override this setting

rafzi commented 3 years ago

the entry point is now chosen based on the loaded ELF file