Updating RISCV architecture for reading CSRs rdtime, rdcycle and rdinstret

tum-ei-eda / etiss

Extendable Translating Instruction Set Simulator

https://tum-ei-eda.github.io/etiss/

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Closed Samanti-Das closed 2 years ago

Samanti-Das commented 2 years ago

Added a jitlib allowing access to simulate internal statistics. Also updated the RISC architecture to use this statistics for these 3 CSRs.

fpedd commented 2 years ago

Related to #105