search

tum-ei-eda / etiss

Extendable Translating Instruction Set Simulator
https://tum-ei-eda.github.io/etiss/
Other
29 stars 36 forks source link

CSR MSTATUS for RISCV architecture doens't work -> add it to the VirtualStruct #121

Closed lasseUrban closed 2 years ago

lasseUrban commented 2 years ago

In etiss/ArchImpl/RISCV/RISCVArchSpecificImp.h are only the following CSRs added to the VirtualStruct:

addCSR(CSR_MISA); addCSR(CSR_MIE); addCSR(CSR_MTVEC); addCSR(CSR_MEPC); addCSR(CSR_MCAUSE); addCSR(CSR_MTVAL);

I use Etiss is the fault injection virtual platform FIVP and added all the missing CSRs myself. All the CSRs work and I can read and write them except the mstatus register CSR768 at address 0x300.

Why is this important register not added to the virtualStruct by default? Additionally, can you check why it is not working? The register is zero during the complete simulation although it should not. I ensured that my test program sets the mstatus register, but when I read it through the virtualStruct, it is always zero.

lasseUrban commented 2 years ago

I solved this issue myself in add missing CSRs to RISCV arch spec #122 Nothing to do for you here except merging. Thank you!