search

tum-ei-eda / seal5

Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization
https://tum-ei-eda.github.io/seal5/
Apache License 2.0
8 stars 3 forks source link

Merge RV32 and RV64 example #103

Open PhilippvK opened 4 weeks ago

PhilippvK commented 4 weeks ago

This can be done in a single demo.py script with XLEN=${XLEN:-32} to override xlen via the cmdline/environment.