Open PhilippvK opened 1 month ago
The RISCVRegisterInfo.td
patch for adding ACC
as custom reg is very minimal, since LLVM does not care about the size and type of the reg.
// RISCVRegisterInfo.td - riscv_register_info - INSERTION_START
def ACC : RISCVReg<0, "acc">;
// RISCVRegisterInfo.td - riscv_register_info - INSERTION_END
@thomasgoodfellow I forgot to mention that before we can merge this, https://github.com/DLR-SE/riscv-coredsl-extensions/pull/3/files would need to be merged first…
This is an example how the
Uses
&Defs
are added to the tablegen code: