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tuura / plato

A DSL for asynchronous circuits specification
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Added manual and changed modules to use STG instead of concat #43

Closed jrbeaumont closed 8 years ago

snowleopard commented 8 years ago

Looks very nice. Just one comment above.

jrbeaumont commented 8 years ago

@snowleopard: As you'll see I've included all the movement of modules in this. I also need to make some changes to Workcraft for this, as it has a default emtpy concepts file using the wrong module import

snowleopard commented 8 years ago

Great! You'll also need to generate new screenshots, as currently they still show Concat.

snowleopard commented 8 years ago

@jrbeaumont Let me know when you are done with the screenshots, and I'll merge this.

jrbeaumont commented 8 years ago

Oh right, that's a problem.

I'll do it when I get home, I'm currently on OS X and screenshotting is a pain.

snowleopard commented 8 years ago

No problem, take your time.

jrbeaumont commented 8 years ago

@snowleopard: The images have been updated.

snowleopard commented 8 years ago

OK, let's now drop type signatures Eq a => a -> ... -> CircuitConcept a from the docs.

jrbeaumont commented 8 years ago

@snowleopard: Type signatures dropped. All tested and working. Manual updated.

snowleopard commented 8 years ago

@jrbeaumont Awesome! Merged now.