twilco / riscv-from-scratch

The code for the RISC-V from scratch blog post series.
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Rom memory overlap error #1

Open nolash opened 3 years ago

nolash commented 3 years ago

Hey, thanks for a brilliantly written tutorial. Impressive clarity!

I am trying to make it work with qemu-riscv64 and riscv64-elf-* tools from archlinux. It compiles fine, but when I run, I get the following error:

$ qemu-system-riscv64 -machine virt -m 128M -gdb tcp::1234 -S -kernel a.out 
VNC server running on ::1:5900
rom: requested regions overlap (rom /usr/share/qemu/opensbi-riscv64-virt-fw_jump.bin. free=0x0000000080000054, addr=0x0000000080000000)
qemu-system-riscv64: rom check and register reset failed

I've reduced the main code to just int main { return 0; }, which disassembles to:

$ riscv64-elf-objdump -d a.out 

a.out:     file format elf64-littleriscv

Disassembly of section .init:

0000000080000000 <_start>:
    80000000:   00002197            auipc   gp,0x2
    80000004:   88418193            addi    gp,gp,-1916 # 80001884 <__global_pointer$>
    80000008:   08000117            auipc   sp,0x8000
    8000000c:   ff810113            addi    sp,sp,-8 # 88000000 <__stack_top>
    80000010:   00010433            add s0,sp,zero
    80000014:   0040006f            j   80000018 <main>

Disassembly of section .text:

0000000080000018 <main>:
    80000018:   1101                    addi    sp,sp,-32
    8000001a:   ec22                    sd  s0,24(sp)
    8000001c:   1000                    addi    s0,sp,32
    8000001e:   4785                    li  a5,1
    80000020:   fef42623            sw  a5,-20(s0)
    80000024:   4789                    li  a5,2
    80000026:   fef42423            sw  a5,-24(s0)
    8000002a:   fec42703            lw  a4,-20(s0)
    8000002e:   fe842783            lw  a5,-24(s0)
    80000032:   9fb9                    addw    a5,a5,a4
    80000034:   fef42223            sw  a5,-28(s0)
    80000038:   fe442783            lw  a5,-28(s0)
    8000003c:   2785                    addiw   a5,a5,1
    8000003e:   2781                    sext.w  a5,a5
    80000040:   fe442703            lw  a4,-28(s0)
    80000044:   9fb9                    addw    a5,a5,a4
    80000046:   fef42223            sw  a5,-28(s0)
    8000004a:   4781                    li  a5,0
    8000004c:   853e                    mv  a0,a5
    8000004e:   6462                    ld  s0,24(sp)
    80000050:   6105                    addi    sp,sp,32
    80000052:   8082                    ret
[lash@tranquillo riscv]$ riscv64-elf-objdump -D a.out 

a.out:     file format elf64-littleriscv

Disassembly of section .init:

0000000080000000 <_start>:
    80000000:   00002197            auipc   gp,0x2
    80000004:   88418193            addi    gp,gp,-1916 # 80001884 <__global_pointer$>
    80000008:   08000117            auipc   sp,0x8000
    8000000c:   ff810113            addi    sp,sp,-8 # 88000000 <__stack_top>
    80000010:   00010433            add s0,sp,zero
    80000014:   0040006f            j   80000018 <main>

Disassembly of section .text:

0000000080000018 <main>:
    80000018:   1101                    addi    sp,sp,-32
    8000001a:   ec22                    sd  s0,24(sp)
    8000001c:   1000                    addi    s0,sp,32
    8000001e:   4785                    li  a5,1
    80000020:   fef42623            sw  a5,-20(s0)
    80000024:   4789                    li  a5,2
    80000026:   fef42423            sw  a5,-24(s0)
    8000002a:   fec42703            lw  a4,-20(s0)
    8000002e:   fe842783            lw  a5,-24(s0)
    80000032:   9fb9                    addw    a5,a5,a4
    80000034:   fef42223            sw  a5,-28(s0)
    80000038:   fe442783            lw  a5,-28(s0)
    8000003c:   2785                    addiw   a5,a5,1
    8000003e:   2781                    sext.w  a5,a5
    80000040:   fe442703            lw  a4,-28(s0)
    80000044:   9fb9                    addw    a5,a5,a4
    80000046:   fef42223            sw  a5,-28(s0)
    8000004a:   4781                    li  a5,0
    8000004c:   853e                    mv  a0,a5
    8000004e:   6462                    ld  s0,24(sp)
    80000050:   6105                    addi    sp,sp,32
    80000052:   8082                    ret

Disassembly of section .eh_frame:

0000000080000058 <__DATA_BEGIN__-0x102c>:
    80000058:   0014                    0x14
    8000005a:   0000                    unimp
    8000005c:   0000                    unimp
    8000005e:   0000                    unimp
    80000060:   00527a03            0x527a03
    80000064:   7c01                    lui s8,0xfffe0
    80000066:   0101                    addi    sp,sp,0
    80000068:   07020d1b            addiw   s10,tp,112
    8000006c:   0001                    nop
    8000006e:   0000                    unimp
    80000070:   0010                    0x10
    80000072:   0000                    unimp
    80000074:   001c                    0x1c
    80000076:   0000                    unimp
    80000078:   ff88                    sd  a0,56(a5)
    8000007a:   ffff                    0xffff
    8000007c:   0018                    0x18
    8000007e:   0000                    unimp
    80000080:   0000                    unimp
    ...

0x80000052 is the end of main, but stops two bytes before the next section .eh_frame. My guess is that it's some sort of alignment problem, but I'm not sure how to read most of this stuff, so any pointers would be welcome!

I've attached my .ld script and .dts output with this post:

riscv64-virt.dts.txt riscv64-virt.ld.txt

nolash commented 3 years ago

I had a chat with pm215 on #qemu@oftc irc, and he identified the problem to be bios that gets automatically loaded at memory start. Also -kernel adds some magic, making the PC start in a different place (0x1000 on mine).

Adding -bios none and using -device loader,file=<elf-file>,cpu-num=0 instead of using -kernel <elf-file> solves it.

this is the culprit:

https://www.qemu.org/docs/master/system/deprecated.html#risc-v-bios-since-5-1