We implement our first set of interrupt handling routines for aarch64 and test this with the CNTP generic timer present in aarch64 systems. Specifically, we implement the ClockHardware interface for the timer, register it in the time subsystem and are able to read absolute time from it. We also test if we can generate an interrupt after some time has passed, and handle that as well. The interrupt handler for the timer at the moment does not do anything interesting. This will change as we add more complex functionality to the aarch64 kernel such as scheduling.
This PR is completely independent of #122 , and does not rely on any functionality it has. In the future we plan to actually map in the MMIO as device memory. This would need to be a separate PR, as it requires more functionality in addition to changes in #122.
Summary:
Implement ClockHardware interface for the aarch64 physical timer
Register the physical timer in the timer subsystem
Add a generic IRQ handler in the exception vector table
We implement our first set of interrupt handling routines for aarch64 and test this with the
CNTPgeneric timer present in aarch64 systems. Specifically, we implement theClockHardwareinterface for the timer, register it in the time subsystem and are able to read absolute time from it. We also test if we can generate an interrupt after some time has passed, and handle that as well. The interrupt handler for the timer at the moment does not do anything interesting. This will change as we add more complex functionality to the aarch64 kernel such as scheduling.This PR is completely independent of #122 , and does not rely on any functionality it has. In the future we plan to actually map in the MMIO as device memory. This would need to be a separate PR, as it requires more functionality in addition to changes in #122.
Summary:
ClockHardwareinterface for the aarch64 physical timer