Closed PandaZ3D closed 1 year ago
Are you planning to, in the future, add some kind of SMP lock in there like the x86 code has?
Are you planning to, in the future, add some kind of SMP lock in there like the x86 code has?
Yes. The aarch64 port does not currently support SMP. So that would be one of the many things we would have to implement.
This patch fixes a bug in the context switch code for aarch64. The problem was that since the
_old_thread
var was "unused" when compiled in release mode the function would inline the assembly when a context switch happened. This is problematic since usingx0/x1
which point to the arguments lose all meaning. We fixed this by explicitly using the arguments and assigning the thread save area to registers used in the assembly.