I'm currently utilizing SystemVerilog modules generated by Hardfloat in a project and encountered a requirement for Verilog modules that facilitate conversion between the standard IEEE 754 format and Hardfloat's custom "recoded" format.
Proposed Change:
To address this, I propose the instantiation of dedicated classes specifically for this conversion process. This approach aims to produce distinct Verilog modules, ensuring a more streamlined and manageable integration within projects requiring such format conversions.
Benefits:
Enhances modularity and reusability of conversion logic.
Simplifies integration into existing and future projects by providing ready-to-use Verilog modules.
Maintains separation of concerns by dedicating specific classes to handle the conversion process.
I believe this enhancement will significantly benefit others in the community who might be facing similar challenges. I'm eager to hear your thoughts on this suggestion and am open to further discussion or modifications based on feedback.
Hello,
I'm currently utilizing SystemVerilog modules generated by Hardfloat in a project and encountered a requirement for Verilog modules that facilitate conversion between the standard IEEE 754 format and Hardfloat's custom "recoded" format.
Proposed Change:
To address this, I propose the instantiation of dedicated classes specifically for this conversion process. This approach aims to produce distinct Verilog modules, ensuring a more streamlined and manageable integration within projects requiring such format conversions.
Benefits:
I believe this enhancement will significantly benefit others in the community who might be facing similar challenges. I'm eager to hear your thoughts on this suggestion and am open to further discussion or modifications based on feedback.
Thank you for considering my proposal.