ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
https://chipyard.readthedocs.io/en/stable/
BSD 3-Clause "New" or "Revised" License
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Yosys ERROR: Can't open ABC output file #1573

Open nerdylye opened 1 year ago

nerdylye commented 1 year ago

Background Work

Chipyard Version and Hash

Release: 1.10.0 Hash: a6a6a6

OS Setup

Linux

Other Setup

I'm trying to run ASAP7 synthesis using Yosys tool by changing the TOOLS_CONF to example-openroad.yml under ASAP7. ASAP7 PDK and cell libraries are installed from asap7pdk and their PATHs are specified correctly in example-asap7.yml.

Modifications were also done in yosys init.py line 271: self.verbose_append(f"dfflibmap -map-only -liberty {liberty_file}"). Without -map-only in the function, the error of "$_DFFPP0 and $_DFFPP1 cells in the final BLIF output, which don't exist in any of the standard cell libraries" will appear.

After dfflibmap, the flow continues with abc mapping where the error appears.

def syn_map(self) -> bool:

        self.block_append(f"""
        # Technology mapping for cells
        # ABC supports multiple liberty files, but the hook from Yosys to ABC doesn't
        # TODO: this is a bad way of getting one liberty file, need a way to merge all std cell lib files
        abc -D {self.clock_period} \\
            -constr "{self.mapped_sdc_path}" \\
            -liberty "{self.liberty_files_tt.split()[0]}" \\
            -showtmp

        # Replace undef values with defined constants
        # TODO: do we need this??
        setundef -zero

        # Split multi-bit nets into single-bit nets.
        # Splitting nets resolves unwanted compound assign statements in netlist (assign [..] = [..])
        splitnets

        # Remove unused cells and wires
        opt_clean -purge
        """)
        return True

Current Behavior

Screenshot 2023-08-04 170945

Error does not specify anything which is hard to debug... I managed to locate the temp file _tmp_yosys-abc-UYxEf4 and observed the abc.script file shown below. Based on the code below, it should read input.blif before trying to open output.blif but log message shows the error to open output.blif file before reading the input.blif file.

image

Any idea how to solve it?

Expected Behavior

Synthesis run successfully

Other Information

No response

exhaust-create commented 3 months ago

hello, have you successfully solved this problem?