ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
https://chipyard.readthedocs.io/en/stable/
BSD 3-Clause "New" or "Revised" License
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RoCC Punch Trough Signal #1987

Open eric900115 opened 1 month ago

eric900115 commented 1 month ago

Background Work

Feature Description

Hi all,

I am trying to develop a custom RoCC accelerator in Rocket Tile and would like to connect signals to a master MMIO Accelerator and also to ChipTop. Are there any suggestions on how to punch through the signals from RoCC to both the MMIO Accelerator and ChipTop?

Note that Master MMIO accelerator will connect to Sbus, such as connect init zero module on Sbus. And, RoCC accelerator will attach to Rocket Tile as co-processor.

Thanks

Motivating Example

Punch through the signals from RoCC to both the MMIO Accelerator and ChipTop

jerryz123 commented 1 month ago

I think the way to do this is

  1. Create a BundleBridgeSource in your rocc module with the signals that need to be punched to the MMIO accelerator
  2. Create a BundleBridgeSink in your MMIO accelerator with the same signals
  3. In your CanHaveCustomMMIO trait which integrates the MMIO into the system bus, query and filter the list of tiles and rocc-accelerators to find only your custom ones
  4. Connect the BundleBridgeSource to the BundleBridgeSink using diplomacy's :=

I do something similar in rerocc, where the rerocc client (RoCC accelerators) punch signals to the ReRoCC bus (which just lives in the subsystem). This doesn't use BundleBriidgeSource, it uses a custom diplomacy node implementation, but the principle is the same.

See:

eric900115 commented 1 month ago

Thanks, @jerryz123 . I will give it a try and would like to share my implementation here after I'm done.

franktaTian commented 2 weeks ago

Or, for simple, just "How to punch rocc interface signals to ChipTop" , so that one can integrate his co-processor just in verilog?

franktaTian commented 2 weeks ago

Hi, I follow your guide step by step , but cannot find the "BundleBridgeSource". I think the problem is how to "query and filter the list of tiles and rocc-accelerators to find only your custom ones" in CanHaveCustomMMIO.

I think the way to do this is

  1. Create a BundleBridgeSource in your rocc module with the signals that need to be punched to the MMIO accelerator
  2. Create a BundleBridgeSink in your MMIO accelerator with the same signals
  3. In your CanHaveCustomMMIO trait which integrates the MMIO into the system bus, query and filter the list of tiles and rocc-accelerators to find only your custom ones
  4. Connect the BundleBridgeSource to the BundleBridgeSink using diplomacy's :=

I do something similar in rerocc, where the rerocc client (RoCC accelerators) punch signals to the ReRoCC bus (which just lives in the subsystem). This doesn't use BundleBriidgeSource, it uses a custom diplomacy node implementation, but the principle is the same.

See:

franktaTian commented 1 week ago

Any help?

franktaTian commented 2 days ago

Thanks, @jerryz123 . I will give it a try and would like to share my implementation here after I'm done.

Do you have any progress?