ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
https://chipyard.readthedocs.io/en/stable/
BSD 3-Clause "New" or "Revised" License
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How do you use TSI Widget in Bringup VCU118? #967

Closed michael-etzkorn closed 3 years ago

michael-etzkorn commented 3 years ago

Hi I'm trying to understand what was connected over the FMC pins to utilize a TSI Host Widget for testing an SoC on the VCU118. After seeing https://github.com/ucb-bar/testchipip/issues/116 I'm guessing the documentation doesn't exist yet, but I would love a rough English overview of how to take advantage of this widget. In the meantime, I'll look at how to utilize it by reading through the source code.

abejgonzalez commented 3 years ago

Are you trying to test an SoC prototype on the VCU118 or are you trying to use the VCU118 as a test platform to interact with a separate DUT? The TSI Host Widget helps with the latter. It maps an MMIO TSI interface (see 1) that can be attached from a prototype SoC on the VCU118 to a slow digital SerDes port located on the FMC (see 2). Additionally, it exposes a memory port that connects to 1 channel of the DDR of the VCU118 so that the DUT can use it (the DUT sends memory requests over the slow SerDes port). I would look at 8.2.3.3 of the documentation, here the "Serialized TL" is going over the FMC cable.

1 - https://chipyard.readthedocs.io/en/latest/Advanced-Concepts/Chip-Communication.html#example-test-chip-bringup-communication 2 - https://github.com/ucb-bar/chipyard/blob/9d055fdac638ab90735cbde42fd2d86355eb260b/fpga/src/main/scala/vcu118/bringup/CustomOverlays.scala#L172-L183

michael-etzkorn commented 3 years ago

I see. I mistakenly thought it had to do with testing the SoC prototype on the VCU118. I assume we can use an ILA for that. I do find the idea of using the VCU118 as a test platform an interesting one. Something to explore later :) Thanks for the info!

abejgonzalez commented 3 years ago

Correct. I would just use an ILA for that. Also, if you want more debugging capabilities and deterministic FPGA-accelerated simulation I would look at FireSim.