Closed jjtoms4s closed 6 years ago
i have done what the tutorial tells ,but i still confuse about how to apply it in fpga does anyone can give me a clue 。 thanks a lot
Please check out https://github.com/freechipsproject/chisel3/wiki/Frequently-Asked-Questions#get-me-verilog and feel free to let us know if you have more question.
i have done what the tutorial tells ,but i still confuse about how to apply it in fpga does anyone can give me a clue 。 thanks a lot