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ucb-bar / chisel2-deprecated

chisel.eecs.berkeley.edu
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Queue is not getting synthesized #737

Open preyas3359 opened 7 years ago

preyas3359 commented 7 years ago

Hi,

I am using Synopsys tool to synthesize a verilog netlist generated from Chisel implementation. Tool is not able to map any library cells to reg_files of Queue creating sequential generated structures (named SEQGEN in synthesized netlist)

PS:I have checked completeness of library used.

Has anybody seen similar issue?

Thanks & Regards, Preyas