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ucb-bar / hammer

Hammer: Highly Agile Masks Made Effortlessly from RTL
BSD 3-Clause "New" or "Revised" License
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Support toy non-MMMC runs in <=32nm processes in Cadence #764

Open edwardcwang opened 5 years ago

edwardcwang commented 5 years ago

Right now process nodes <=32nm in Cadence encounter the following fatal Innovus error if run in non-MMMC mode.

The workaround is to hack the node to 33 or higher but it would be great to support this out of the box, especially for new users.

**ERROR: (IMPEXT-6198):
 Extraction will not take place because the technology file is not
specified for all RC corners. Technology files are needed for preRoute
extraction and effort level medium or high or signoff of postRoute
extraction when the process node set using set setDesignMode -process
is less than or equal to 32 nm. Use the commands create_rc_corner or
update_rc_corner to specify the technology file for all corners and
run the extraction again.
sequencer commented 5 years ago

I have added all corner to mmmc_corner in asap7(ss,tt,ff), However, same problem still exist, when I look into code, I find that https://github.com/ucb-bar/hammer/blob/bc00fc2f09e3cfa0c157830698ab33b120d8883d/src/hammer-vlsi/hammer_vlsi/hammer_vlsi_impl.py#L1244 will only consume the last matched MMMCCornerType.Setup and MMMCCornerType.Hold, thus, not entire mmmc_corner are included in the PaR generation.

sequencer commented 5 years ago

successed after adding "qrc techfile"