ucb-bar / hwacha

Microarchitecture implementation of the decoupled vector-fetch accelerator
http://hwacha.org/
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vpl instruction: assertion failed #8

Closed ShuyunJia closed 5 years ago

ShuyunJia commented 5 years ago

Hi,

I'm running such a piece of code in hwacha

    vset vp0
    vpl vp1, va1
    vlw vv1, va0
@vp1 vfirst vs1, vv1  
   ...

It runs successfully in Spike, while gets the following assertion in hwacha at scalar-unit.scala:297 assert(!vf_active || !io.imem.resp.valid || id_ctrl.ival, "illegal instruction exception!") I looked into scalar-unit.scala and found that it seems there is no decode table for vpl/vps instructions.
Does these two instructions supported in hwacha?

Thanks,
-Shuyun

a0u commented 5 years ago

No, the predicate memory instructions remain unimplemented in RTL, but they can be emulated with a compare operation and a vector byte load/store. Modifying your code sample:

    vpset vp0
    vlbu vv1, (va1)
    vcmpeq vp1, vv1, vs0
    vlw vv1, (va0)
@!vp1 vfirst vs1, vv1
    ...
ShuyunJia commented 5 years ago

Your suggestion works. Issue closed.
Thanks!