Print Synthesis Improvements

ucb-bar / midas

FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL

Other

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Closed davidbiancolin closed 5 years ago

davidbiancolin commented 5 years ago

Summary of changes:

+printfile -> +print-file for consistency with other plusargs
Adds an optional cycle prefix in human-readable mode (set with +print-cycle-prefix)
Aligns destination buffer to page-boundary to fix DMA bug (see firesim/firesim#208)

davidbiancolin commented 5 years ago

@a0u @alonamid @sagark This is ready for review.