F1 model pass - Githubissues

ucb-bar / midas

FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL

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F1 model pass #41

Closed davidbiancolin closed 7 years ago

davidbiancolin commented 7 years ago

This tacks on a pass to the end of the midas compiler to transform modules that have F1 annotations that have been elaborated during platform mapping.