Closed soniab closed 4 years ago
We don't support the V-extension yet (it could theoretically be added by creating a new provider and implementing the needed matmul/conv/pooling/etc. kernels, however). There was some work in progress to support UCB's non-standard Hwacha vector accelerator, but I'm not sure about the progress of that.
Also is it required to use gemmini to support riscv ISA?
No it's not required to use Gemmini. You can run using pure CPU mode, (by passing -x 0
to the imagenet runner), and it will do all operations on the cpu.
Does onnxruntime supports RISC-V Vector ISA extension? Also is it required to use gemmini to support riscv ISA?