CoreTester requires 32-bit wide hex files and TileTester requires 64-bit wide hex files, while the verilator testharness expects 128-bit wide hex files.
To unify these, we tried to use a MemoryArrayInitAnnotation to inject the raw RAM data into the generated FIRRTL for CoreTester, however this significantly slowed down verilator simulation for the benchmarks (from a few seconds to several minutes per benchmark).
Now, we will just generate the 32-bit and 64-bit variants of the hex files from the Scala test and stick with using the loadMemoryFromFileInline Chisel annotation which is performant. This will let us eliminate the checked-in hex file variants.
CoreTester requires 32-bit wide hex files and TileTester requires 64-bit wide hex files, while the verilator testharness expects 128-bit wide hex files.
To unify these, we tried to use a MemoryArrayInitAnnotation to inject the raw RAM data into the generated FIRRTL for CoreTester, however this significantly slowed down verilator simulation for the benchmarks (from a few seconds to several minutes per benchmark).
Now, we will just generate the 32-bit and 64-bit variants of the hex files from the Scala test and stick with using the loadMemoryFromFileInline Chisel annotation which is performant. This will let us eliminate the checked-in hex file variants.