ucb-bar riscv-mini issues

ucb-bar / riscv-mini

Simple RISC-V 3-stage Pipeline in Chisel

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Bump sbt

#22 ucbjrl closed 5 years ago
0
Support pure chisel3 (3.2-SNAPSHOT)

#21 ucbjrl closed 5 years ago
1
Clean up mini to make it easier as a stand-alone library

#20 azidar closed 4 years ago
2
Building priv-1.7 riscv-toolchain fails

#19 noureddine-as closed 2 years ago
3
bump scala version (2.12)

#18 donggyukim closed 5 years ago
0
Does this code have a bug?

#17 lengrongfu closed 2 years ago
0
Error in make command

#16 sagarbaba closed 2 years ago
4
Fix a typo in Opcode.scala

#15 felixonmars closed 6 years ago
1
riscv-mini doesn't support print and declare the float data type variable

#14 jtxiao82 closed 3 years ago
1
pad zeros to benchmark hex

#13 donggyukim closed 6 years ago
0
a protential bug

#12 sequencer closed 6 years ago
2
new benchmark hex files

#11 donggyukim closed 6 years ago
0
Generated Tile.v won't compile

#10 Hoblovski closed 2 years ago
4
instruction doesn't appear in spec?

#9 sequencer closed 6 years ago
2
compile deprecated

#8 sequencer closed 6 years ago
1
Travis support

#7 donggyukim closed 6 years ago
0
Fixed Strober homepage Link

#6 colin4124 closed 6 years ago
1
Support for verilator and custom benchmarks

#5 donggyukim closed 6 years ago
0
after I use quartus II 9.0 to compile Title.v successfully, but I double click ALUArea::alu module turn on error below attached

#4 zhouxs1023 closed 2 years ago
1
Running simulation with other programs?

#3 hauhsu closed 6 years ago
1
No more chisel testers

#2 donggyukim closed 7 years ago
0
Midas integration

#1 donggyukim closed 8 years ago
0