ccelio
commented
8 years ago IPI is interprocessor interrupts. Completely unused for Sodor.
The HTIF is the Host/Target Interface, which has the front-end server (riscv-fesvr, running on your host computer) communicating with the target design (Sodor). The riscv-fesvr loads the binary into the Sodor memory via the HTIF mem ports, and then uses the Control/Status Registers to bring the core out of reset. Once the program is finished, Sodor tells the riscv-fesvr it is finished via the tohost CSR and simulation ends.
HTIF is a non-standard tool for Berkeley processors, so there's no documentation on it. It is going to disappear soon, as the RISC-V platform spec is released and the cores are updated to be self-hosting.
zwabbit
poweihuang17
hadirkhan10
jerryz123
You can see here that after the SerialAdapter requests 0x8000_0000, the L2 immediately sees that request. However, the L2 is not ready to receive requests until many cycles later, as it spends time resetting itself. After L2 is reset, it handles the request, sees 0x8000_0000 is not cached, and then requests the line from Scratchpad.
Is there any documentation on what the HTIF ports actually are and how to use them? For example the CSR ports seem to be command ports, mem ports memory ports, which would imply the ipi ports are instruction ports. But if the ipi ports are instruction ports, how are we supposed to load instructions for it when all of its ports are only one bit wide? And so on.