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ucb-bar / riscv-sodor

educational microarchitectures for risc-v isa
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bit patterns of shift immediate instructions #50

Open miguelbarao opened 5 years ago

miguelbarao commented 5 years ago

In the file riscv-sodor/src/common/instructions.scala, I noticed that the bit patterns of the shift immediate instructions slli, srli and srai only have 6 bits on the left while the specification has 7. Is this an error?

ccelio commented 5 years ago

I don't think I understand what you are asking. Can you elaborate?

As background information, the instructions.scala is auto-generated from riscv-tools infrastructure which is also used by other chisel processors, such as (https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/rocket/Instructions.scala) (although sodor may be out of date a tad on the privileged stuff).

miguelbarao commented 5 years ago

Nevermind, my mistake. The bit patterns apply to RV64 while I was looking to RV32. It's correct.