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educational microarchitectures for risc-v isa
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Out of time during test rv32ui-p-simple #57

Closed Phantom1003 closed 4 years ago

Phantom1003 commented 4 years ago

Errors when run make run-emulator

> make run-emulator            

running basedir/Makefile: make run-emulator

make -C emulator/rv32_1stage/ run
make[1]: Entering directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage'
make -C /home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/fesvr libfesvr.a
make[2]: Entering directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/fesvr'
make[2]: 'libfesvr.a' is up to date.
make[2]: Leaving directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/fesvr'
verilator --cc --exe  --top-module Top +define+PRINTF_COND=1 --assert --output-split 20000 --x-assign unique -I/home/phantom/mychip/riscv-sodor/vsrc -O3 -CFLAGS "-O1 -std=c++11 -g -I/home/phantom/mychip/riscv-sodor/emulator/common -I/home/phantom/mychip/riscv-sodor/riscv-isa-sim -DVERILATOR -include /home/phantom/mychip/riscv-sodor/emulator/common/verilator.h" -LDFLAGS " /home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/fesvr/libfesvr.a -lpthread" -o /home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/emulator generated-src/Top.v /home/phantom/mychip/riscv-sodor/vsrc/SimDTM.v /home/phantom/mychip/riscv-sodor/emulator/common/emulator.cpp /home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/SimDTM.o
make -C /home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/obj_dir -f VTop.mk
make[2]: Entering directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/obj_dir'
make[2]: Nothing to be done for 'default'.
make[2]: Leaving directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage/obj_dir'
./emulator +max-cycles=30000 /home/phantom/mychip/riscv-sodor/install/riscv-tests/rv32ui-p-simple 3>&1 1>&2 2>&3 | /home/phantom/mychip/riscv-sodor/emulator/common/tracer.py > output/rv32ui-p-simple.out
/home/phantom/mychip/riscv-sodor/emulator/common/Makefile.include:215: recipe for target 'output/rv32ui-p-simple.out' failed
make[1]: *** [output/rv32ui-p-simple.out] Error 255
make[1]: Leaving directory '/home/phantom/mychip/riscv-sodor/emulator/rv32_1stage'
Makefile:99: recipe for target 'emulator/rv32_1stage/generated-src/timestamp' failed
make: *** [emulator/rv32_1stage/generated-src/timestamp] Error 2

Following is the part of the result from ./emulator +max-cycles=30000 /home/phantom/mychip/riscv-sodor/install/riscv-tests/rv32ui-p-simple 

...
Cyc=      29705 [1] pc=[80000024] W[r 8=00000000][0] Op1=[r30][fffffffc] Op2=[r 0][00000000] inst=[000f0463]     DASM(000f0463)
Cyc=      29706 [1] pc=[80000028] W[r 0=8000002c][1] Op1=[r30][fffffffc] Op2=[r 0][00000000] inst=[000f0067]  R  DASM(000f0067)
Cyc=      29707 [1] pc=[fffffffc] W[r 0=00000000][1] Op1=[r 0][00000000] Op2=[r12][00000000] inst=[04c0006f]  J  DASM(04c0006f)
Cyc=      29708 [1] pc=[00000048] W[r10=00000000][1] Op1=[r 0][00000000] Op2=[r20][00000000] inst=[f1402573]     DASM(f1402573)
Cyc=      29709 [1] pc=[0000004c] W[r 0=00000000][0] Op1=[r10][00000000] Op2=[r 0][00000000] inst=[00051063]     DASM(00051063)
Cyc=      29710 [1] pc=[00000050] W[r 5=00000050][1] Op1=[r 0][00000000] Op2=[r 0][00000050] inst=[00000297]     DASM(00000297)
Cyc=      29711 [1] pc=[00000054] W[r 5=00000060][1] Op1=[r 5][00000050] Op2=[r16][00000010] inst=[01028293]     DASM(01028293)
Cyc=      29712 [1] pc=[00000058] W[r 0=00000100][1] Op1=[r 5][00000060] Op2=[r 5][00000060] inst=[30529073]     DASM(30529073)
Cyc=      29713 [1] pc=[0000005c] W[r 0=00000000][1] Op1=[r 0][00000000] Op2=[r 0][00000000] inst=[18005073]     DASM(18005073)
Cyc=      29714 [1] pc=[00000060] W[r 5=00000060][1] Op1=[r 0][00000000] Op2=[r 0][00000060] inst=[00000297]     DASM(00000297)
*** FAILED *** (timeout) after 30000 cycles
chadyuu commented 4 years ago

@Phantom1003

This problem may arise from chisel version.

In my case, the following change worked well.

build.sbt val defaultVersions = Map("chisel3" -> "latest.release") ↓ val defaultVersions = Map("chisel3" -> "3.3.0")

Phantom1003 commented 4 years ago

@Phantom1003

This problem may arise from chisel version.

In my case, the following change worked well.

build.sbt val defaultVersions = Map("chisel3" -> "latest.release") ↓ val defaultVersions = Map("chisel3" -> "3.3.0")

Thank you, I will have a try