Open HakamAtassi opened 7 months ago
I believe lines 64 through 66 in src/main/testchip/csrc/SimDRAM.cc
should be modified as follows
as endianness_t is not defined anywhere.
This fixes an issue when building with building esp-tools and subsequently hwacha in chipyard.
The required type seems to somehow depend on whether esp-tools or riscv-tools is being built.
I believe lines 64 through 66 in src/main/testchip/csrc/SimDRAM.cc
should be modified as follows
as endianness_t is not defined anywhere.
This fixes an issue when building with building esp-tools and subsequently hwacha in chipyard.