ucb-cyarp vitis issues - Githubissues

ucb-cyarp / vitis

Laminar - Optimizing DSP Compiler

BSD 3-Clause "New" or "Revised" License

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issues

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Doc update

#117 cyarp closed 2 years ago
0
SubBlocking

#116 cyarp closed 2 years ago
0
Debug Fanout Issue with Sub-Blocking and Clock Domain

#115 cyarp opened 2 years ago
1
Automated Sub-blocking Sometimes Causes Scheduling Error

#114 cyarp closed 2 years ago
1
Implement Virtual Partitions to Resolve Some Communication Cycles with Feed Forward Segment

#113 cyarp opened 2 years ago
1
(Possibly) Fix NCO Block Import from Matlab

#112 cyarp opened 2 years ago
1
Master to Work Branch

#111 cyarp closed 2 years ago
0
Loc action

#110 cyarp closed 2 years ago
0
Create cloc.yml

#109 cyarp closed 2 years ago
0
License and Google Test Change

#108 cyarp closed 2 years ago
0
Google Test changed "master" branch to "main"

#107 cyarp closed 2 years ago
0
Insert calls to pthread_attr_destroy

#106 cyarp opened 3 years ago
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Update Communication Estimator To Handle I/O FIFOs operating at Base Rate

#105 cyarp opened 3 years ago
0
Delay (in TappedDelay with Passthrough), BlockingInput, and ClockDomainInput should check if they were previously emitted in cEmitExpr

#104 cyarp opened 3 years ago
1
Blocking Outputs Emitted in Each Partition - Should Only Be Emitted in Partition They Reside In

#103 cyarp opened 3 years ago
1
Need to update design clone method to map some of the new Node/Arc/ClockDomain/Port links

#102 cyarp opened 3 years ago
0
In the future (after upsample domains implemented or multiple base sub-blocking lengths supported), need to modify MasterNodes to have per-arc indexing rather than per port

#101 cyarp opened 3 years ago
2
FIFO Merging Diminished By FIFOs in Blocking Domains

#100 cyarp opened 3 years ago
1
Create another compressed type for repeated dimension (for Repeat operating in vector mode)

#99 cyarp opened 3 years ago
0
Automated sub-blocking breaks output emit for single thread target

#98 cyarp opened 3 years ago
3
Double Buffering FIFO is not supported with new sub-blocking logic

#97 cyarp opened 3 years ago
3
Check Delay Initial Condition Logic

#96 cyarp opened 3 years ago
0
Implement Tapped Delay Logic for Block Size > 1

#95 cyarp opened 3 years ago
0
Add Additional Buffer Variants to Delay and Tapped Delay with Block Size > 1

#94 cyarp opened 3 years ago
0
Implement Extra Space Circular Buffer Implementation of of Delays < Sub-Block Size

#93 cyarp opened 3 years ago
0
Create a github action to test if cyclopsDemo can be built with chang…

#92 cyarp closed 3 years ago
0
Aug2021 cleanup3

#91 cyarp closed 3 years ago
0
Extend Clock Domain Logic to Avoid Unnecessary Clock Domain Logic when Multiple Clock Domains Present in Partition but None are Base Rate

#90 cyarp opened 3 years ago
0
Row vs. Column Major - Matlab / C Convention Conflict

#89 cyarp opened 3 years ago
0
Row/Column Vectors in Simulink Need to Be Converted to a 1D Array for Laminar to view them as 1D vectors

#88 cyarp opened 3 years ago
1
False Combinational Loop when Enabled Subsystem Context and Mux Context are Circularly Dependent

#87 cyarp opened 3 years ago
0
Adding bytes per base rate sample to the exported communication graph…

#86 cyarp closed 3 years ago
0
cyclopsRev1_1

#85 cyarp closed 3 years ago
0
Partition Generates Superfluous Indexing Logic when All Nodes are within Same Clock Domain that is Not the Base Clock

#84 cyarp opened 3 years ago
0
Support Context Expansion Barriers

#83 cyarp opened 3 years ago
0
Context Expansion Sometimes Causes Communication Cycles

#82 cyarp opened 3 years ago
3
Support Clock Domains Not In Explicit Partition

#81 cyarp opened 3 years ago
0
Support FIFO delay absorption when fanout occurs after delay.

#80 cyarp opened 3 years ago
1
Forgot to commit new FSM generation script

#79 cyarp closed 3 years ago
0
In place fifo prefetch

#78 cyarp opened 3 years ago
0
Improving PAPI support

#77 cyarp opened 3 years ago
0
Fix state fanout

#76 cyarp closed 3 years ago
0
FIFO Double Buffer

#75 cyarp closed 3 years ago
0
Create graphviz dot export for visualization

#74 cyarp closed 3 years ago
1
Adding missing arc_dimension property in exported graphml. Fixes #71

#73 cyarp closed 3 years ago
0
master to fifoDoubleBuffer

#72 cyarp closed 3 years ago
0
arc_dimension parameter missing from parameter list in exported GraphML

#71 cyarp closed 3 years ago
0
In Place FIFOs and Local State

#70 cyarp closed 3 years ago
0
Update README.md

#69 cyarp closed 3 years ago
0
First pass at supporting FIFO double buffering in compute cores

#68 cyarp closed 3 years ago
0