Add MPU-B style banked ROM (and RAM) to IMSAI memory

[dmcnaugh]

Discussed first in #18

[dmcnaugh]

I've staged a PR #21 for a new branch with MPU-B style banked ROM/RAM. Its not ready to merge into dev, but its something to review and improve.

[udo-munk]

I choose to disable the feature where the bank switching resets to power on default when port 0f3h >> is read as this causes the CP/M survey command to crash the simulated machine.

The survey program allows to exclude ports from the scan, some of the FDC also don't like unintended reads in some state. Not sure if it really works, if I remeber right at least one Tarbell FDC port should be excluded, but isn't. Might need some fixes, but should be done instead of not implementing the hadware as correct as possible.

[dmcnaugh]

OK, I see the source survey.mac on the cpm22 disk for the Imsai. Can you tell me which Macro Assembler it requires? I tried with the CP/M Macro Assembler mac.com on the same disk and it didn't work.

I see in the source that it can be made to skip a single IO port. Currently configured to allow for a Tarbel FDC, IMS400 FDC and a Godbout FDC, although all of these are set FALSE so nothing is skipped. Should be easy to add details to skip port 0f3h for the IMSAI MPU-B.

Once I've modified survey to behave nicely, I'll change the control port read to behave the same as the original hardware. Then I'll check each use of mem_base() and see if there are any problems.

load_mos() might have to be changed to write a byte at a time to memory and not a block write. Are there any examples of this type of file load you can direct me to for me to test with, I haven't noticed any.

[udo-munk]

It requires Microsoft m80, is included on the CP/M 2.2 disks for the cpmsim machine.

Right, these FDC's would hang the system on read to some port, so they can be excluded. The Tarbell emulation won't hold the CPU forever, so I left it set to FALSE.

Assemble anything with the z80pack z80asm using option -fm, this generates binaries in the Mostek format which then can be loaded. Assemble something for ORG <> 0 and load, then you'll see why we used this format.

If there are no problems with mem_base() now, there might be later. That is why I resisted to page the memory it self, but use a 64K segment with the page table and a ROM overlay. Also not sure which performace impact it has using memory pages, the address calculations might cost a lot more. Well, one should run the IMSAI at 2-4 anyway and nowadys systems won't have problems with this I guess.

[dmcnaugh]

Thanks, will try M80 and also generate some Mostek files to load.

Regarding performance, I have had no negative impact using the approach demonstrated in #21. And my environment is very performance sensitive as I'm running on an ESP32 micro-controller @ 240MHz. At present I'm getting my best ever simulated clock speeds of 4.818Mhz and that is with this paging/vector implementation.

[udo-munk]

Sounds good. Can you modify the PR so that it can be applied to dev? Else I have to fiddle it into somehow.

The change in sim0.c where PC=saadr is commented out will be wrong/uncomfortable for the other machines. That needs to be done in the IMSAI specific parts somewhere. Are you sure you always want PC=0 at cold start? Then you have to set the start address for other firmware/standalone software evey time from the front panel, which gets old quick. So the cheat to set the start address automatically. Would need to examine the loaded monitor, and if anything was loaded at d800+ then set PC=0.

[dmcnaugh]

Still working on this, have some improvements to make to the PR.

[dmcnaugh]

Done and ready. PR #21 has been updated, documented and is ready to merge into dev.

[udo-munk]

Seems to work great, thanks.