Closed zr5177 closed 1 year ago
Hi,
This is a lot of work. You would have to edit the pcileech_cfgspace.coe)
file, the pcie_7x_0.xci
file and most probably also edit the verilog sources for the xilinx generated pcie core manually.
Unfortunately this is not something I'd be able to help with unfortunately. But I hope you'll have success in your project. I wish you the best with your DMA project.
If u still struggle on this issue, i'm glad to help.
If u still struggle on this issue, i'm glad to help.
I need help
I need your help.
I hope you all are able to help each others with this.
Unfortunately I'm not able to help with this since I haven't done it in the detail you require myself, also it's too close to games hacking which I don't wish to support (although I have no issues with the tools being used for it). I just don't wish to get involved.
Thanks for understanding and best wishes with these projects.
I need help
I need help
I want to customize all PCIe configuration spaces (including lines 40 and 60) with vivado. What should I do to achieve it? I can pay for it. This content is translated by machine, please forgive me.