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ufrisk / pcileech

Direct Memory Access (DMA) Attack Software
GNU Affero General Public License v3.0
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PCIeSquirrel FPGA: ERROR: Unable to connect to USB/FT601 device [0, v0.0, 0000] #272

Closed Aiden-10 closed 1 year ago

Aiden-10 commented 1 year ago

I received by lambda concept squirrel yesterday and everything appeared to work just fine. I then tried following your steps to change the Vendor Id, Device Id, DSN etc. that is when I began seeing the error in the title. I tried reverting back to the precompiled pcileech firmware found here I am able to flash successfully following all the steps provided in LC documentation. I then try and run pcileech and get this error listed in the title.

Any help would be appreciated, Thanks

ufrisk commented 1 year ago

It may be a bad flash or a mistake you made in your bitstream or a bad USB cable connection.

The FPGA LED should blink 3-4 times at power-on. If it does blink 3-4 times at power-on that means that the FPGA is properly flashed and that it's most likely the USB cable (it may be a bad change on your part as well, but those are rare when it comes to the USB interface).

If it does not blink at all at power-on that would mean that you have a bad flash. Try to flash the original bitstream loaded from here: https://github.com/ufrisk/pcileech-fpga/tree/master/PCIeSquirrel in that case.

Let me know how it goes, and best wishes with your project.

Aiden-10 commented 1 year ago

Thanks! You were right. The problem was with my usb connection. I received a usb c to 3.0 adapter with my dma and used that when connecting to laptop and solved issue.

However, I do have one question regarding editing the config space. I picked up a 20-dollar sound card off amazon and I am planning on dumping the config space of that card and placing it in PCIeSquirrel/ip/pcileech_cfgspace.coe . Would simply grouping the bytes per dword and replacing it into the config space in place of old bytes work without messing anything up? Sorry for my lack of knowledge I'm not very experienced messing with hardware but I'm willing to learn. If you could give me a few directions on what I can and can't change in the config space, I would be very grateful.

ufrisk commented 1 year ago

Nice to see the issue was resolved.

For more info about building your own bitstream see, https://github.com/ufrisk/pcileech-fpga/blob/master/PCIeSquirrel/readme.md

It's not sufficient to change the .coe file only, the PCIe core would have to be updated in Xilinx Vivado as well.

Unfortunately I won't be able to help with this, but I wish you the best in your DMA project.

I'm closing this issue since it's now resolved.