ujamjar / hardcaml

[Deprecated see github.com/janestreet/hardcaml] Register Transfer Level Hardware Design in OCaml
https://github.com/janestreet/hardcaml
ISC License
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Add a signal partition operation in Signal.Comb #23

Closed xguerin closed 1 year ago

xguerin commented 7 years ago

It would be nice to have a partition operation on signals, for instance:

val slice : t -> int -> t list